Timetable
The timetable can be found here.
Technical and social activities
The program includes:
- Eight technical sessions, with 26 talks (see details below).
- A welcome reception and cocktail at the Museo Patio Herreriano (Contemporary Art Museum) on Wednesday, 6th July.
- A talk delivered by Prof. Uday Bondhugula on optimization infrastructures for compiler construction (see details below).
- A guided tour to the National Sculpture Museum on Thursday, 7th.
- A Gala Dinner at the Parrilla de San Lorenzo, one of the best restaurants in the city, on Thursday 7th.
- A “Tapas Lunch” on Friday, 8th at the bars located around the city center.
Session A: Heterogeneous Computing (Wednesday 6, 9:15 to 10:30)
- How to Write Performance Portable Codes using the Heterogeneous Programming Library, Jorge F. Fabeiro, Diego Andrade, Basilio B. Fraguela and Ramón Doallo.
- Current status and directions for the Bohrium runtime system, Kenneth Skovhede, Mads R. B. Kristensen, Simon Andreas Frimann Lund, Brian Vinter and Mads Ohm Larsen.
- Compilers for Heterogeneous Computing, Philip Ginsbach and Michael O’Boyle.
Session B: Intermediate Representation (Wednesday 6, 11:00 to 12:30)
- Embedding Fork-Join Parallelism into LLVM IR, William Moses, Tao Schardl and Charles Leiserson.
- EIN: An Intermediate Representation for Compiling Tensor Calculus, Charisee Chiw, John Reppy and Gordon Kindlmann
- An Intermediate Representation for Compiling Nested Data Parallelism, John Reppy and Joe Wingerter
Session C: Speculation and Transactional Memory (Wednesday 6, 13:30 to 14:45)
- The Role of Thread-level Speculation in the Manycore Era, Diego R. Llanos and Arturo Gonzalez-Escribano.
- Improvements in Hardware Transactional Memory for GPU Architectures, Alejandro Villegas, Rafael Asenjo, Angeles Navarro and Oscar Plata
- Exploring Fallback Solutions in Best-Effort Hardware Transactional Memory, Ricardo Quislant, Eladio Gutiérrez and Oscar Plata
Session D: Memory Hierarchies and Programming Tools (Wednesday 6, 15:15 to 16:45)
- Architectural exploration of heterogeneous memory systems, Marcos Horro Varela, Gabriel Rodríguez Álvarez, Juan Touriño Domínguez and Mahmut T. Kandemir.
- Bandwidth-Based Page Allocation for NUMA Architectures, Martin Oliveira, Emilio Francesquini, Alexandro Baldassin, Guido Araujo and J. Nelson Amaral
- A high-performance framework for complex decision support processes, Ate Penders, Ana Lucia Varbanescu, Gregor Pavlin and Henk Sips
- Compiler Optimization for Parallel Recursive Traversals of K-d Trees, Samyam Rajbhandari, Jinsung Kim, Sriram Krishnamoorthy, Louis-Noel Pouchet, Fabrice Rastello, Robert Harrison and Saday Sadayappan.
Invited Lecture: Dr. Uday Bondhugula (Thursday 7, 9:00 to 10:30)
Title: Reusable Infrastructure for Optimization in Domain-Specific and General-Purpose Compilers
Abstract: Challenges in compiler parallelization and optimization for the multicore era can broadly be classified into two categories: one that makes progress on optimization support in general-purpose compilers for high-performance languages (eg. LLVM, GCC, other commercial production compilers, and research compilers), and the other in building domain-specific compilers/code generators with an objective to provide effective automatic parallelization, optimization, and programmer productivity. This talk will motivate the need to build optimization infrastructure that benefits and can be shared by both approaches, and discuss possible ways to accomplish this. Two particular example domains will be presented as case studies: (1) image processing pipelines, and (2) numerical solvers for partial differential equations. Short video demos will also be performed.
Uday Bondhugula is an Assistant Professor in the Department of Computer Science and Automation at the Indian Institute of Science (IISc) in Bangalore, India. His research interests are in programming and compiler/runtime technologies for multicore architectures with an emphasis on high performance and automatic parallelization, the design of domain-specific compilers, and the polyhedral compiler framework. Before joining IISc, he was with the Advanced Compiler Technologies group at the IBM T.J. Watson Research Center, Yorktown Heights, New York. He received his Ph.D. in Computer Science and Engineering from the Ohio State University, and his B-Tech in Computer Science and Engineering from the Indian Institute of Technology, Madras. Web: http://www.csa.iisc.ernet.in/~
Session E: Accelerators and IR (Thursday 7, 11:00 to 12:30)
- Low-level functional GPU programming for parallel algorithms, Martin Dybdal, Martin Elsman, Bo Joel Svensson and Mary Sheeran
- On the Performance Modeling of Graph Processing Primitives on GPUs, Merijn Verstraaten, Souley Madougou, Ana Lucia Varbanescu and Cees De Laat.
- Sparse Analysis of Variable Path Predicates Based Upon CSSA-Form, Thomas Heinze and Wolfram Amme
Session F: Balance and energy consumption (Thursday 7, 13:30 to 14:45)
- Compiler-Directed Energy Optimization on Power-Gated VLIW Architecture, Yung-Cheng Ma and Tzu-Hsuan Liao
- Compiler Phase Ordering as an Orthogonal Approach for Reducing Energy Consumption, Ricardo Nobre, Luís Reis and João M.P. Cardoso
- In Search of Balanced Microarchitectures for Numerical Applications, Victoria Caparrós Cabezas and Markus Püschel
Session G: Code Analysis (Friday 8, 9:00 to 10:30)
- Identifying Parallel Patterns in C++ Codes, David Del Río Astorga, Manuel F. Dolz, Luis Miguel Sanchez, Jose Daniel Garcia, Marco Danelutto and Massimo Torquati
- Optimized variant-selection code generation for loops on heterogeneous multicore systems, Erik Hansson and Christoph Kessler
- Improving Detection of Data Races and Misuses of Lock-Free Queues via Semantics, Manuel F. Dolz, David Del Río Astorga, Javier Fernandez, Jose Daniel Garcia, Felix Garcia-Carballeria, Marco Danelutto and Massimo Torquati
- Infrastructure and API Extensions for Elastic and Fault Tolerant Execution of MPI Applications, Isaías A. Comprés Ureña and Michael Gerndt
Session H: Domain Specific Languages (Friday 8, 11:00 to 12:15)
- A Dynamic to Static DSL Compiler for Image Processing Applications, Pierre Guillou, Benoît Pin, Fabien Coelho and François Irigoin.
- A Basic Linear Algebra Compiler for Structured Matrices, Daniele Spampinato and Markus Püschel.
- Fully Automatic Cluster Support for SAC Using a Custom Software DSM Solution, Clemens Grelck and Thomas Macht